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NXP Semiconductors /LPC408x_7x /I2S /TXMODE

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Interpret as TXMODE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SELECT_THE_TX_FRACTI)TXCLKSEL 0 (TX4PIN)TX4PIN 0 (TXMCENA)TXMCENA 0RESERVED

TXCLKSEL=SELECT_THE_TX_FRACTI

Description

I2S Transmit mode control.

Fields

TXCLKSEL

Clock source selection for the transmit bit clock divider.

0 (SELECT_THE_TX_FRACTI): Select the TX fractional rate divider clock output as the source

1 (RESERVED): Reserved

2 (SELECT_THE_RX_MCLK_S): Select the RX_MCLK signal as the TX_MCLK clock source

3 (RESERVED): Reserved
TX4PIN

Transmit 4-pin mode selection. When 1, enables 4-pin mode.
TXMCENA

Enable for the TX_MCLK output. When 0, output of TX_MCLK is not enabled. When 1, output of TX_MCLK is enabled.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data